//*************************************************************************************
//#Project  :XAD1606
//#Version  :v3
//-------------------------change list-------------------------------------------------
//===============================================================================
//--Version.----------------Content-----------------------------------Who---
//============================================================
//|- 1-|- initial version                                                     -|-Minjw
//|- 2-|- added IO_MODE0 & IO_MODE1 bit in configuartion words                -|-jiaojy    20190701
//|- 3-|- modify T0CON register address and modify  configuartion words       -|-Minjw     20190704
//***********************************************************

#ifndef __XAD1606_H
#define __XAD1606_H

#define _XTAL_FREQ 16000000

#pragma inline(_delay)
extern void _delay(unsigned long);
#define __delay_us(x) _delay((unsigned long)((x)*(_XTAL_FREQ/4000000)))

/* C access to assembler insructions */
#define CLRWDT()        asm(" clrwdt")
#define NOP()           asm(" nop")
#define RESET()         asm(" reset")
#define SLEEP()         asm(" sleep")


/* common definitions */

#define	___mkstr1(x)	#x
#define	___mkstr(x)	___mkstr1(x)

#define	__CONFIG(x)	asm("\tpsect config,class=CONFIG,delta=2");\
			asm("\tdw "___mkstr(x));

//#define __intnop() asm("\tpsect myint,class=CODE,delta=2") \
//			asm("\tORG 300h"); \
//			asm("\tdw 0");

//#define	__CONFIG(x,y,z)	asm("\tpsect config,class=CONFIG,delta=2");\
//			asm("\tdw "___mkstr(x)); \
//			asm("\tdw "___mkstr(y)); \
//			asm("\tdw "___mkstr(z)); 

//
// Configuration mask definitions
//

// Config Register: CONFIG1
//;----- CONFIG1 Options --------------------------------------------------
#define OTP_MODE_4K     0X3FFF    //OTP_4K
#define OTP_MODE_2K_0   0X3EFF    //OTP_2K0
#define OTP_MODE_2K_1   0X3CFF    //OTP_2K1
#define OTP_MODE_1K_0   0X38FF    //OTP_1K0
#define OTP_MODE_1K_1   0X30FF    //OTP_1K1
#define OTP_MODE_1K_2   0X20FF    //OTP_1K2
#define OTP_MODE_1K_3   0X00FF    //OTP_1K3

#define RDPIN_ON        0x3FFF    //read pin input enable       
#define RDPIN_OFF       0x3F7F    //read register input enabled 

#define FINTOSC_DIV1    0x3FFF    // Fosc DIVIDER 1:1  
#define FINTOSC_DIV2    0x3FEF    // Fosc DIVIDER 1:2  
#define FINTOSC_DIV4    0x3FDF    // Fosc DIVIDER 1:4  
#define FINTOSC_DIV8    0x3FCF    // Fosc DIVIDER 1:8  
#define FINTOSC_DIV16   0x3FBF    // Fosc DIVIDER 1:16 

#define LVT_20V         0x3FF0    // Brown-out Reset set to 2.0V 
#define LVT_21V         0x3FF1    // Brown-out Reset set to 2.1V 
#define LVT_22V         0x3FF2    // Brown-out Reset set to 2.2V 
#define LVT_24V         0x3FF3    // Brown-out Reset set to 2.4V 
#define LVT_26V         0x3FF4    // Brown-out Reset set to 2.6V 
#define LVT_27V         0x3FF5    // Brown-out Reset set to 2.7V 
#define LVT_29V         0x3FF6    // Brown-out Reset set to 2.9V 
#define LVT_30V         0x3FF7    // Brown-out Reset set to 3.0V                        
#define LVT_31V         0x3FF8    // Brown-out Reset set to 3.1V 
#define LVT_33V         0x3FF9    // Brown-out Reset set to 3.3V 
#define LVT_36V         0x3FFA    // Brown-out Reset set to 3.6V 
#define LVT_37V         0x3FFB    // Brown-out Reset set to 3.7V 
#define LVT_38V         0x3FFC    // Brown-out Reset set to 3.8V 
#define LVT_41V         0x3FFD    // Brown-out Reset set to 4.1V 
#define LVT_42V         0x3FFE    // Brown-out Reset set to 4.2V 

//;----- CONFIG2 Options --------------------------------------------------
#define OTPDIS_OFF      0x3FFF    // OTP Read Enabled 
#define OTPDIS_ON       0x3F7F    // OTP Read Disabled
                        
#define PROTECT_OFF     0x3FFF    // Otp protection off
#define PROTECT_ON      0x3FBF    // Otp protection on

#define IO_MODE0        0x3FDF    // IO_MODE = 0
#define IO_MODE1        0x3FFF    // IO_MODE = 1
                           
#define OSCM_16M        0x3FFF    // FOSC IS 16MHZ
#define OSCM_1M         0x3FEF    // FOSC IS 1MHZ
                            
#define RESSEL_LOW      0x3FFF    // PULL RES IS 30K, LOW RES IS 30K
#define RESSEL_HIGH     0x3FF7    // PULL RES IS 190K, LOW RES IS 300K
                            
#define FCPUS_2T        0x3FF9    // SELTCT 2 T SPEED
#define FCPUS_4T        0x3FFF    // SELTCT 4 T SPEED

#define IDIS_OFF        0x3FFF    //  disable  IO
#define IDIS_ON         0x3FFE    //  enable   IO 


//;----- CONFIG3 Options --------------------------------------------------
#define RESETE_OFF      0x3FFF    // External Reset disabled
#define RESETE_ON       0x3F7F    // External Reset enabled

#define LVTEN_OFF       0x3FFF    // Disable BOR reset
#define LVTEN_ON        0x3FBF    // Enable BOR reset 
  
#define MCU_SEL_ADCPU2  0x3FFF    // PIC16C72
#define MCU_SEL_ADCPU1  0x3FBF    // FM8PE53B
#define MCU_SEL_ADCPU0  0x3FEF    // EM78P153

#define WDTE_OFF        0x3FF7    //  ; WDT disabled
#define WDTE_ON         0x3FFF    //  ; WDT enabled

#define TWDT_111        0x3FFF    //; PWRT = TWDT (no prescaler) = 32ms
#define TWDT_110        0x3FFE    //; PWRT = TWDT (no prescaler) = 4.5ms
#define TWDT_101        0x3FFD    //; PWRT = TWDT (no prescaler) = 288ms
#define TWDT_100        0x3FFC    //; PWRT = TWDT (no prescaler) = 72ms
#define TWDT_011        0x3FFB    //; PWRT = 640us, TWDT (no prescaler)=32ms
#define TWDT_010        0x3FFA    //; PWRT = 640us, TWDT (no prescaler)=4.5ms
#define TWDT_001        0x3FF9    //; PWRT = 640us, TWDT (no prescaler)=288ms
#define TWDT_000        0x3FF8    //; PWRT = 640us, TWDT (no prescaler)=72ms

//================================================================================================
 
//
// Special function register definitions
//


//-------------------------------------------BANK0---------------------------------
// Register: INDF
volatile unsigned char           INDF                @ 0x000;
// bit and bitfield definitions


// Register: TMR0
volatile unsigned char           TMR0                @ 0x001;
volatile unsigned char           PR0                 @ 0x091;
// Register: PCL
volatile unsigned char           PCL                 @ 0x002;
// bit and bitfield definitions

// Register: STATUS
volatile unsigned char           STATUS              @ 0x003;
// bit and bitfield definitions
volatile bit C                   @ ((unsigned)&STATUS*8)+0;
volatile bit DC                  @ ((unsigned)&STATUS*8)+1;
volatile bit ZERO                @ ((unsigned)&STATUS*8)+2;
volatile bit nPD                 @ ((unsigned)&STATUS*8)+3;
volatile bit nTO                 @ ((unsigned)&STATUS*8)+4;
volatile bit RP0                 @ ((unsigned)&STATUS*8)+5;
volatile bit RP1                 @ ((unsigned)&STATUS*8)+6;
volatile bit RST                 @ ((unsigned)&STATUS*8)+7;

#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	C                   : 1;
        unsigned	DC                  : 1;
        unsigned	Z                   : 1;
        unsigned	nPD                 : 1;
        unsigned	nTO                 : 1;
        unsigned	RP                  : 2;
        unsigned	RST                 : 1;
    };
    struct {
        unsigned	                    : 5;
        unsigned	RP0                 : 1;
        unsigned	RP1                 : 1;
    };
} STATUSbits @ 0x003;
#endif

// Register: FSR
volatile unsigned char           FSR                 @ 0x004;
// bit and bitfield definitions

volatile unsigned char           PORTA               @ 0x005;
// bit and bitfield definitions
volatile bit PA0                @ ((unsigned)&PORTA*8)+0;
volatile bit PA1                @ ((unsigned)&PORTA*8)+1;
volatile bit PA2                @ ((unsigned)&PORTA*8)+2;
volatile bit PA3                @ ((unsigned)&PORTA*8)+3;
volatile bit PA4                @ ((unsigned)&PORTA*8)+4;
volatile bit PA5                @ ((unsigned)&PORTA*8)+5;

// Register: PORTB
volatile unsigned char           PORTB               @ 0x006;
// bit and bitfield definitions
volatile bit PB0                @ ((unsigned)&PORTB*8)+0;
volatile bit PB1                @ ((unsigned)&PORTB*8)+1;
volatile bit PB2                @ ((unsigned)&PORTB*8)+2;
volatile bit PB3                @ ((unsigned)&PORTB*8)+3;
volatile bit PB4                @ ((unsigned)&PORTB*8)+4;
volatile bit PB5                @ ((unsigned)&PORTB*8)+5;
volatile bit PB6                @ ((unsigned)&PORTB*8)+6;
volatile bit PB7                @ ((unsigned)&PORTB*8)+7;

// Register: T2CON
volatile unsigned char           T2CON               @ 0x007;
// bit and bitfield definitions
volatile bit T2CKPS0             @ ((unsigned)&T2CON*8)+0;
volatile bit T2CKPS1             @ ((unsigned)&T2CON*8)+1;
volatile bit TMR2ON              @ ((unsigned)&T2CON*8)+2;
volatile bit TOUTPS0             @ ((unsigned)&T2CON*8)+3;
volatile bit TOUTPS1             @ ((unsigned)&T2CON*8)+4;
volatile bit TOUTPS2             @ ((unsigned)&T2CON*8)+5;
volatile bit TOUTPS3             @ ((unsigned)&T2CON*8)+6;
volatile bit PWM2CAEN            @ ((unsigned)&T2CON*8)+7;

// Register: PCON
volatile unsigned char           PCON                @ 0x008;
// bit and bitfield definitions
volatile bit LVT0                @ ((unsigned)&PCON*8)+0;
volatile bit LVT1                @ ((unsigned)&PCON*8)+1;
volatile bit LVT2                @ ((unsigned)&PCON*8)+2;
volatile bit LVT3                @ ((unsigned)&PCON*8)+3;
volatile bit LVDM0               @ ((unsigned)&PCON*8)+4;
volatile bit LVDM1               @ ((unsigned)&PCON*8)+5;
volatile bit PB0ST               @ ((unsigned)&PCON*8)+6;
volatile bit WDTE                @ ((unsigned)&PCON*8)+7;

// Register: PIR1
volatile unsigned char           PIR1                @ 0x009;
volatile bit INT0IF              @ ((unsigned)&PIR1*8)+0;
volatile bit INT1IF              @ ((unsigned)&PIR1*8)+1;
volatile bit INT2IF              @ ((unsigned)&PIR1*8)+2;
volatile bit LVDIF               @ ((unsigned)&PIR1*8)+6;


// Register: PCLATH
volatile unsigned char           PCLATH              @ 0x00A;
// bit and bitfield definitions
#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	                    : 2;
    };
} PCLATHbits @ 0x00A;
#endif
// Register: T0CON
volatile unsigned char           T0CON               @ 0x00B;
// bit and bitfield definitions
volatile bit T0PS0               @ ((unsigned)&T0CON*8)+0;
volatile bit T0PS1               @ ((unsigned)&T0CON*8)+1;
volatile bit T0PS2               @ ((unsigned)&T0CON*8)+2;
volatile bit PSA                 @ ((unsigned)&T0CON*8)+3;
volatile bit T0SE                @ ((unsigned)&T0CON*8)+4;
volatile bit T0CS0               @ ((unsigned)&T0CON*8)+5;
volatile bit T0CS1               @ ((unsigned)&T0CON*8)+6;
volatile bit T0OUT               @ ((unsigned)&T0CON*8)+7;
// Register: TMR1H
volatile unsigned char           TMR1H               @ 0x00C;
  
// Register: TMR1L
volatile unsigned char           TMR1L               @ 0x00D;

// Register: PIE0
volatile unsigned char           PIE0               @ 0x00E;
// bit and bitfield definitions
volatile bit T0IE                @ ((unsigned)&PIE0*8)+0;
volatile bit PBIE                @ ((unsigned)&PIE0*8)+1;
volatile bit CCPIE               @ ((unsigned)&PIE0*8)+2;
volatile bit OPIE                @ ((unsigned)&PIE0*8)+3;
volatile bit ADIE                @ ((unsigned)&PIE0*8)+4;
volatile bit T1IE                @ ((unsigned)&PIE0*8)+5;
volatile bit T2IE                @ ((unsigned)&PIE0*8)+6;
volatile bit GIE                 @ ((unsigned)&PIE0*8)+7;

// Register: PIR0
volatile unsigned char           PIR0               @ 0x00F;
// bit and bitfield definitions
volatile bit T0IF                @ ((unsigned)&PIR0*8)+0;
volatile bit PBIF                @ ((unsigned)&PIR0*8)+1;
volatile bit CCPIF               @ ((unsigned)&PIR0*8)+2;
volatile bit OPIF                @ ((unsigned)&PIR0*8)+3;
volatile bit ADIF                @ ((unsigned)&PIR0*8)+4;
volatile bit T1IF                @ ((unsigned)&PIR0*8)+5;
volatile bit T2IF                @ ((unsigned)&PIR0*8)+6;
volatile bit MAPEN               @ ((unsigned)&PIR0*8)+7;

// Register: CCPR1H
volatile unsigned char           CCPR1H              @ 0x010;

// Register: CCPR1L
volatile unsigned char           CCPR1L              @ 0x011;
  
// Register: CCPR1LH
volatile unsigned char          CCPR1LH              @ 0x012;

// Register: DACON
volatile unsigned char           DACON               @ 0x013;
volatile bit DAC0                @ ((unsigned)&DACON*8)+0;
volatile bit DAC1                @ ((unsigned)&DACON*8)+1;
volatile bit DAC2                @ ((unsigned)&DACON*8)+2;
volatile bit DAC3                @ ((unsigned)&DACON*8)+3;
volatile bit DACS4               @ ((unsigned)&DACON*8)+4;
volatile bit DACS5               @ ((unsigned)&DACON*8)+5;
volatile bit DACEN               @ ((unsigned)&DACON*8)+6;
volatile bit DAC_SEL             @ ((unsigned)&DACON*8)+7;

// Register: OPCON1
volatile unsigned char           OPCON1              @ 0x014;
// bit and bitfield definitionS
volatile bit OUTEN             @ ((unsigned)&OPCON1*8)+0;
volatile bit CMPMODE           @ ((unsigned)&OPCON1*8)+1;
volatile bit OPPOS             @ ((unsigned)&OPCON1*8)+2;
volatile bit PGAEN             @ ((unsigned)&OPCON1*8)+3;
volatile bit PCH2              @ ((unsigned)&OPCON1*8)+4;
volatile bit AN_AVSS           @ ((unsigned)&OPCON1*8)+5;
volatile bit LVDST             @ ((unsigned)&OPCON1*8)+6;
volatile bit OPOUT             @ ((unsigned)&OPCON1*8)+7;

// Register: OPCON
volatile unsigned char           OPCON              @ 0x015;
// bit and bitfield definitions
volatile bit NCH0               @ ((unsigned)&OPCON*8)+0;
volatile bit NCH1               @ ((unsigned)&OPCON*8)+1;
volatile bit PCH0               @ ((unsigned)&OPCON*8)+2;
volatile bit PCH1               @ ((unsigned)&OPCON*8)+3;
volatile bit A1O2N              @ ((unsigned)&OPCON*8)+4;
volatile bit A1NS               @ ((unsigned)&OPCON*8)+5;
volatile bit EX                 @ ((unsigned)&OPCON*8)+6;
volatile bit OPON               @ ((unsigned)&OPCON*8)+7;

// Register: TMR2L
volatile unsigned char           TMR2L               @ 0x016;
  
// Register: TMR2H
volatile unsigned char           TMR2H               @ 0x017;


// Register: PMS
volatile unsigned char           PMS                @ 0x018;
// bit and bitfield definitions 
volatile bit PMS00                      @ ((unsigned)&PMS*8)+0;
volatile bit PMS01                      @ ((unsigned)&PMS*8)+1;
volatile bit PMS10                      @ ((unsigned)&PMS*8)+2;
volatile bit PMS11                      @ ((unsigned)&PMS*8)+3;
volatile bit CMPFILTER0                 @ ((unsigned)&PMS*8)+4;
volatile bit CMPFILTER1                 @ ((unsigned)&PMS*8)+5;
volatile bit CMPFILTER2                 @ ((unsigned)&PMS*8)+6;
volatile bit CMPFILTER3                 @ ((unsigned)&PMS*8)+7;
// Register: PXC
volatile unsigned char           PXC                @ 0x019;
// bit and bitfield definitions
volatile bit PXC00               @ ((unsigned)&PXC*8)+0;
volatile bit PXC01               @ ((unsigned)&PXC*8)+1;
volatile bit PXC10               @ ((unsigned)&PXC*8)+2;
volatile bit PXC11               @ ((unsigned)&PXC*8)+3;
volatile bit PWM0EN0             @ ((unsigned)&PXC*8)+4;
volatile bit PWM0EN1             @ ((unsigned)&PXC*8)+5;
volatile bit PWM1EN0             @ ((unsigned)&PXC*8)+6;
volatile bit PWM1EN1             @ ((unsigned)&PXC*8)+7;

// Register: DTC
volatile unsigned char           DTC            @ 0x01A;
// bit and bitfield definitions
volatile bit DTD0               @ ((unsigned)&DTC*8)+0;
volatile bit DTD1               @ ((unsigned)&DTC*8)+1;
volatile bit DTD2               @ ((unsigned)&DTC*8)+2;
volatile bit DTD3               @ ((unsigned)&DTC*8)+3;
volatile bit DTD4               @ ((unsigned)&DTC*8)+4;
volatile bit DTEN               @ ((unsigned)&DTC*8)+5;
volatile bit DTCKS0             @ ((unsigned)&DTC*8)+6;
volatile bit DTCKS1             @ ((unsigned)&DTC*8)+7;

// Register: POLS
volatile unsigned char           POLS            @ 0x01B;
// bit and bitfield definitions
volatile bit POLS00               @ ((unsigned)&POLS*8)+0;
volatile bit POLS01               @ ((unsigned)&POLS*8)+1;
volatile bit POLS10               @ ((unsigned)&POLS*8)+2;
volatile bit POLS11               @ ((unsigned)&POLS*8)+3;
volatile bit PT1MODE              @ ((unsigned)&POLS*8)+4;
volatile bit HB1EN                @ ((unsigned)&POLS*8)+5;
volatile bit PT0MODE              @ ((unsigned)&POLS*8)+6;
volatile bit HB0EN                @ ((unsigned)&POLS*8)+7;

// Register: ADRESH
volatile unsigned char           ADRESH            @ 0x01C;
// bit and bitfield definitions

// Register: ADRESL
volatile unsigned char           ADRESL            @ 0x01D;
// bit and bitfield definitions

// Register: ADCON0
volatile unsigned char          ADCON0            @ 0x01E;
// bit and bitfield definitions
volatile bit ADON            @ ((unsigned)&ADCON0*8)+0;
volatile bit GO              @ ((unsigned)&ADCON0*8)+1;
volatile bit DONG            @ ((unsigned)&ADCON0*8)+1;
volatile bit CHS0            @ ((unsigned)&ADCON0*8)+2;
volatile bit CHS1            @ ((unsigned)&ADCON0*8)+3;
volatile bit CHS2            @ ((unsigned)&ADCON0*8)+4;
volatile bit CHS3            @ ((unsigned)&ADCON0*8)+5;
volatile bit ADSP            @ ((unsigned)&ADCON0*8)+6;
volatile bit ADFM            @ ((unsigned)&ADCON0*8)+7;
#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	ADON                : 1;
        unsigned	G0                  : 1;
		unsigned	CHS                 : 4;
        unsigned    ADSP                : 1;
    };
    struct {
        unsigned	ADON                : 1;
        unsigned	GO                  : 1;
        unsigned	CHS0                : 1;
        unsigned	CHS1                : 1;
        unsigned	CHS2                : 1;
        unsigned	CHS3                : 1;
    };
} ADCON0bits @ 0x01e;
#endif


// Register: ADCON1
volatile unsigned char          ADCON1            @ 0x01F;
// bit and bitfield definitions
volatile bit ADCS0           @ ((unsigned)&ADCON1*8)+0;
volatile bit ADCS1           @ ((unsigned)&ADCON1*8)+1;
volatile bit ADCS2           @ ((unsigned)&ADCON1*8)+2;
volatile bit ACQT0           @ ((unsigned)&ADCON1*8)+3;
volatile bit ACQT1           @ ((unsigned)&ADCON1*8)+4;
volatile bit ACQT2           @ ((unsigned)&ADCON1*8)+5;
volatile bit ADVREF0         @ ((unsigned)&ADCON1*8)+6;
volatile bit ADVREF1         @ ((unsigned)&ADCON1*8)+7;
#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	ADCS                : 3;
        unsigned	ACQT                : 3;
		unsigned	ADVREF              : 2;
    };
    struct {
        unsigned	ADCS0               : 1;
        unsigned	ADCS1               : 1;
        unsigned	ADCS2               : 1;
        unsigned	ACQT0               : 1;
        unsigned	ACQT1               : 1;
        unsigned	ACOT2               : 1;
		unsigned    ADVREF0             : 1;
		unsigned    ADVREF1             : 1;
    };
} ADCON1bits @ 0x01f;
#endif

//-------------------------------------------BANK1---------------------------------//
// Register: TRISA
volatile unsigned char           TRISA               @ 0x085;
// bit and bitfield definitions
volatile bit TRISA0              @ ((unsigned)&TRISA*8)+0;
volatile bit TRISA1              @ ((unsigned)&TRISA*8)+1;
volatile bit TRISA2              @ ((unsigned)&TRISA*8)+2;
volatile bit TRISA3              @ ((unsigned)&TRISA*8)+3;
volatile bit TRISA4              @ ((unsigned)&TRISA*8)+4;
volatile bit TRISA5              @ ((unsigned)&TRISA*8)+5;

// Register: TRISB
volatile unsigned char           TRISB               @ 0x086;
// bit and bitfield definitions
volatile bit TRISB0              @ ((unsigned)&TRISB*8)+0;
volatile bit TRISB1              @ ((unsigned)&TRISB*8)+1;
volatile bit TRISB2              @ ((unsigned)&TRISB*8)+2;
volatile bit TRISB3              @ ((unsigned)&TRISB*8)+3;
volatile bit TRISB4              @ ((unsigned)&TRISB*8)+4;
volatile bit TRISB5              @ ((unsigned)&TRISB*8)+5;
volatile bit TRISB6              @ ((unsigned)&TRISB*8)+6;
volatile bit TRISB7              @ ((unsigned)&TRISB*8)+7;
// Register: SMTVA
volatile unsigned char           SMTVA               @ 0x085;
// bit and bitfield definitions
volatile bit SMTVA0              @ ((unsigned)&SMTVA*8)+0;
volatile bit SMTVA1              @ ((unsigned)&SMTVA*8)+1;
volatile bit SMTVA2              @ ((unsigned)&SMTVA*8)+2;
volatile bit SMTVA3              @ ((unsigned)&SMTVA*8)+3;
volatile bit SMTVA4              @ ((unsigned)&SMTVA*8)+4;
volatile bit SMTVA5              @ ((unsigned)&SMTVA*8)+5;

// Register: SMTVB
volatile unsigned char           SMTVB               @ 0x086;
// bit and bitfield definitions
volatile bit SMTVB0             @ ((unsigned)&SMTVB*8)+0;
volatile bit SMTVB1             @ ((unsigned)&SMTVB*8)+1;
volatile bit SMTVB2             @ ((unsigned)&SMTVB*8)+2;
volatile bit SMTVB3             @ ((unsigned)&SMTVB*8)+3;
volatile bit SMTVB4             @ ((unsigned)&SMTVB*8)+4;
volatile bit SMTVB5             @ ((unsigned)&SMTVB*8)+5;
volatile bit SMTVB6             @ ((unsigned)&SMTVB*8)+6;
volatile bit SMTVB7             @ ((unsigned)&SMTVB*8)+7;

// Register: OPCON2
volatile unsigned char           OPCON2              @ 0x087;
// bit and bitfield definitions
volatile bit FILTER4              @ ((unsigned)&OPCON2*8)+7;
volatile bit FILTER3              @ ((unsigned)&OPCON2*8)+6;
volatile bit FILTER2              @ ((unsigned)&OPCON2*8)+5;
volatile bit FILTER1              @ ((unsigned)&OPCON2*8)+4;
volatile bit FILTER0              @ ((unsigned)&OPCON2*8)+3;
volatile bit OPSMT                @ ((unsigned)&OPCON2*8)+2;
volatile bit OPPGA1               @ ((unsigned)&OPCON2*8)+1;
volatile bit OPPGA0               @ ((unsigned)&OPCON2*8)+0;

// Register: CURA
volatile unsigned char           CURA              @ 0x087;
volatile bit CURA0              @ ((unsigned)&CURA*8)+0;
volatile bit CURA1              @ ((unsigned)&CURA*8)+1;
volatile bit CURA2              @ ((unsigned)&CURA*8)+2;
volatile bit CURA3              @ ((unsigned)&CURA*8)+3;
volatile bit CURA4              @ ((unsigned)&CURA*8)+4;
volatile bit CURA5              @ ((unsigned)&CURA*8)+5;

// Register: CURB
volatile unsigned char           CURB              @ 0x088;
volatile bit CURB0              @ ((unsigned)&CURB*8)+0;
volatile bit CURB1              @ ((unsigned)&CURB*8)+1;
volatile bit CURB2              @ ((unsigned)&CURB*8)+2;
volatile bit CURB3              @ ((unsigned)&CURB*8)+3;
volatile bit CURB4              @ ((unsigned)&CURB*8)+4;
volatile bit CURB5              @ ((unsigned)&CURB*8)+5;
volatile bit CURB6              @ ((unsigned)&CURB*8)+6;
volatile bit CURB7              @ ((unsigned)&CURB*8)+7;

// Register: WUBCON
volatile unsigned char           WUBCON               @ 0x088;
// bit and bitfield definitions
volatile bit WUB0              @ ((unsigned)&WUBCON*8)+0;
volatile bit WUB1              @ ((unsigned)&WUBCON*8)+1;
volatile bit WUB2              @ ((unsigned)&WUBCON*8)+2;
volatile bit WUB3              @ ((unsigned)&WUBCON*8)+3;
volatile bit WUB4              @ ((unsigned)&WUBCON*8)+4;
volatile bit WUB5              @ ((unsigned)&WUBCON*8)+5;
volatile bit WUB6              @ ((unsigned)&WUBCON*8)+6;
volatile bit WUB7              @ ((unsigned)&WUBCON*8)+7;
// Register: PIE1
volatile unsigned char           PIE1               @ 0x089;
// bit and bitfield definitions
volatile bit INT0IE               @ ((unsigned)&PIE1*8)+0;
volatile bit INT1IE               @ ((unsigned)&PIE1*8)+1;
volatile bit INT2IE               @ ((unsigned)&PIE1*8)+2;
volatile bit INT0MAP0             @ ((unsigned)&PIE1*8)+3;
volatile bit INT0MAP1             @ ((unsigned)&PIE1*8)+4;
volatile bit LVDIE                @ ((unsigned)&PIE1*8)+6;


// Register: T1CON0
volatile unsigned char            T1CON0               @ 0x08C;
// bit and bitfield definitions
volatile bit TMR1ON              @ ((unsigned)&T1CON0*8)+0;
volatile bit TMR1CS0             @ ((unsigned)&T1CON0*8)+1;
volatile bit T1SYNC              @ ((unsigned)&T1CON0*8)+2;
volatile bit T1SE                @ ((unsigned)&T1CON0*8)+3;
volatile bit T1CKPS0             @ ((unsigned)&T1CON0*8)+4;
volatile bit T1CKPS1             @ ((unsigned)&T1CON0*8)+5;
volatile bit T1CK0               @ ((unsigned)&T1CON0*8)+6;
volatile bit T1CK1               @ ((unsigned)&T1CON0*8)+7;


// Register: T1CON1
volatile unsigned char            T1CON1               @ 0x08D;
// bit and bitfield definitions
volatile bit T1M0                @ ((unsigned)&T1CON1*8)+0;
volatile bit T1M1                @ ((unsigned)&T1CON1*8)+1;
volatile bit T1EDGE              @ ((unsigned)&T1CON1*8)+2;
volatile bit T1CH1               @ ((unsigned)&T1CON1*8)+3;
volatile bit T1CH0               @ ((unsigned)&T1CON1*8)+4;
volatile bit INT0EDGE            @ ((unsigned)&T1CON1*8)+5;
volatile bit INT1EDGE            @ ((unsigned)&T1CON1*8)+6;
volatile bit INT2EDGE            @ ((unsigned)&T1CON1*8)+7;

// Register: CMPCON
volatile unsigned char           CMPCON              @ 0x08E;
volatile bit CMPNCH2                @ ((unsigned)&CMPCON*8)+0;
volatile bit CMPNCH3                @ ((unsigned)&CMPCON*8)+1;
volatile bit CMPPCH2                @ ((unsigned)&CMPCON*8)+2;
volatile bit CMPPCH3                @ ((unsigned)&CMPCON*8)+3;
volatile bit CMPPOS                 @ ((unsigned)&CMPCON*8)+4;
volatile bit CMP_IO_EN              @ ((unsigned)&CMPCON*8)+5;
volatile bit CMP_OUT                @ ((unsigned)&CMPCON*8)+6;
volatile bit CMPEN                  @ ((unsigned)&CMPCON*8)+7;
// bit and bitfield definitions

// Register: CLKCFG1
volatile unsigned char           CLKCFG1            @ 0x08E;
volatile bit OSCM                @ ((unsigned)&CLKCFG1*8)+0;
volatile bit OSCF                @ ((unsigned)&CLKCFG1*8)+1;
volatile bit CKOE0               @ ((unsigned)&CLKCFG1*8)+2;
volatile bit CKOE1               @ ((unsigned)&CLKCFG1*8)+3;



// Register: FVRCON1
volatile unsigned char           FVRCON1            @ 0x08F;
// Register: CLKCFG0
volatile unsigned char           CLKCFG0            @ 0x08F;
volatile bit T0CLKEN              @ ((unsigned)&CLKCFG0*8)+0;
volatile bit T1CLKEN              @ ((unsigned)&CLKCFG0*8)+1;
volatile bit T2CLKEN              @ ((unsigned)&CLKCFG0*8)+2;
volatile bit CCPCLKEN             @ ((unsigned)&CLKCFG0*8)+3;
volatile bit FINTOSC0             @ ((unsigned)&CLKCFG0*8)+4;
volatile bit FINTOSC1             @ ((unsigned)&CLKCFG0*8)+5;
volatile bit FINTOSC2             @ ((unsigned)&CLKCFG0*8)+6;

// bit and bitfield definitions
volatile bit FVR_SEL0             @ ((unsigned)&FVRCON1*8)+0;
volatile bit FVR_SEL1             @ ((unsigned)&FVRCON1*8)+1;
volatile bit FVR_SEL2             @ ((unsigned)&FVRCON1*8)+2;
volatile bit FVR_SEL3             @ ((unsigned)&FVRCON1*8)+3;
volatile bit FVR_SEL4             @ ((unsigned)&FVRCON1*8)+4;
volatile bit FVREN                @ ((unsigned)&FVRCON1*8)+5;
volatile bit FVRPGA               @ ((unsigned)&FVRCON1*8)+6;
volatile bit FVROUTEN             @ ((unsigned)&FVRCON1*8)+7;

// Register: CCPCON
volatile unsigned char           CCPCON              @ 0x090;
// Register:  IAPTRIG
volatile unsigned char           IAPTRIG             @ 0x090;

// Register: PWM2CON0
volatile unsigned char           PWM2CON0          @ 0x091;
// bit and bitfield definitions
volatile bit PWM20POL            @ ((unsigned)&PWM2CON0*8)+0;
volatile bit PWM21POL            @ ((unsigned)&PWM2CON0*8)+1;
volatile bit PWM20OE             @ ((unsigned)&PWM2CON0*8)+4;
volatile bit PWM21OE             @ ((unsigned)&PWM2CON0*8)+5;
volatile bit PWM2ACF             @ ((unsigned)&PWM2CON0*8)+6;
volatile bit PWM2ASF             @ ((unsigned)&PWM2CON0*8)+7;

// Register: IAPCTRL
volatile unsigned char           IAPCTRL            @ 0x091;
volatile bit PG                  @ ((unsigned)&IAPCTRL*8)+0;
volatile bit LOCK                @ ((unsigned)&IAPCTRL*8)+1;
volatile bit RD                  @ ((unsigned)&IAPCTRL*8)+2;
volatile bit SIG                 @ ((unsigned)&IAPCTRL*8)+3;

// Register: PWM0DUTY
volatile unsigned char           PWM0DUTY           @ 0x092;


// Register: IAPADDRH 
volatile unsigned char           IAPADDRH           @ 0x092;


// Register: PWM2CON2
volatile unsigned char           PWM2CON2           @ 0x093;
// bit and bitfield definitions
volatile bit PWM20ADEN           @ ((unsigned)&PWM2CON2*8)+0;
volatile bit PWM20ADPOS          @ ((unsigned)&PWM2CON2*8)+1;
volatile bit IOFLT               @ ((unsigned)&PWM2CON2*8)+2;
volatile bit OPFLT               @ ((unsigned)&PWM2CON2*8)+3;
volatile bit ACLOSE              @ ((unsigned)&PWM2CON2*8)+4;
volatile bit ASTART              @ ((unsigned)&PWM2CON2*8)+5;
volatile bit CMPFLT              @ ((unsigned)&PWM2CON2*8)+6;


// Register: IAPADDRL 
volatile unsigned char           IAPADDRL             @ 0x093;

// Register: PWM2CON3
volatile unsigned char           PWM2CON3            @ 0x094;


// Register: IAPDATH
volatile unsigned char           IAPDATH              @ 0x094;

// Register: IAPDATL
volatile unsigned char           IAPDATL            @ 0x095;
// bit and bitfield definitions

// Register: PR2L
volatile unsigned char           PR2L               @ 0x095;

// Register: IAPWAIT
volatile unsigned char           IAPWAIT            @ 0x096;

// Register: PR2H
volatile unsigned char           PR2H               @ 0x096;


// Register: PWM0CON
volatile unsigned char           PWM0CON               @ 0x097;
// bit and bitfield definitions
volatile bit PWM00EN               @ ((unsigned)&PWM0CON*8)+0;
volatile bit PWM01EN               @ ((unsigned)&PWM0CON*8)+1;
volatile bit PWM02EN               @ ((unsigned)&PWM0CON*8)+2;
volatile bit PWM03EN               @ ((unsigned)&PWM0CON*8)+3;
volatile bit POLS0                 @ ((unsigned)&PWM0CON*8)+4;

// Register: ANASEL0
volatile unsigned char           ANASEL0               @ 0x097;
// bit and bitfield definitions
volatile bit PB0AEN               @ ((unsigned)&ANASEL0*8)+0;
volatile bit PB1AEN               @ ((unsigned)&ANASEL0*8)+1;
volatile bit PB2AEN               @ ((unsigned)&ANASEL0*8)+2;
volatile bit PB3AEN               @ ((unsigned)&ANASEL0*8)+3;
volatile bit PB4AEN               @ ((unsigned)&ANASEL0*8)+4;
volatile bit PB5AEN               @ ((unsigned)&ANASEL0*8)+5;
volatile bit PB6AEN               @ ((unsigned)&ANASEL0*8)+6;
volatile bit PB7AEN               @ ((unsigned)&ANASEL0*8)+7;

volatile unsigned char           ANASEL1               @ 0x098;
// bit and bitfield definitions
volatile bit PA0AEN                @ ((unsigned)&ANASEL1*8)+0;
volatile bit PA1AEN                @ ((unsigned)&ANASEL1*8)+1;
volatile bit PA2AEN                @ ((unsigned)&ANASEL1*8)+2;
volatile bit PA3AEN                @ ((unsigned)&ANASEL1*8)+3;
volatile bit PA4AEN                @ ((unsigned)&ANASEL1*8)+4;
volatile bit PA5AEN                @ ((unsigned)&ANASEL1*8)+5;

// Register: PDACON 
volatile unsigned char           PDACON               @ 0x099;
volatile bit PDA0              @ ((unsigned)&PDACON*8)+0;
volatile bit PDA1              @ ((unsigned)&PDACON*8)+1;
volatile bit PDA2              @ ((unsigned)&PDACON*8)+2;
volatile bit PDA3              @ ((unsigned)&PDACON*8)+3;
volatile bit PDA4              @ ((unsigned)&PDACON*8)+4;
volatile bit PDA5              @ ((unsigned)&PDACON*8)+5;

// Register: ODACON 
volatile unsigned char          ODACON                 @ 0x09A;
// bit and bitfield definitions
volatile bit ODA0              @ ((unsigned)&ODACON*8)+0;
volatile bit ODA1              @ ((unsigned)&ODACON*8)+1;
volatile bit ODA2              @ ((unsigned)&ODACON*8)+2;
volatile bit ODA3              @ ((unsigned)&ODACON*8)+3;
volatile bit ODA4              @ ((unsigned)&ODACON*8)+4;
volatile bit ODA5              @ ((unsigned)&ODACON*8)+5;


// Register: PUACON 
volatile unsigned char          PUACON                 @ 0x09B;
// bit and bitfield definitions
volatile bit PUA0              @ ((unsigned)&PUACON*8)+0;
volatile bit PUA1              @ ((unsigned)&PUACON*8)+1;
volatile bit PUA2              @ ((unsigned)&PUACON*8)+2;
volatile bit PUA3              @ ((unsigned)&PUACON*8)+3;
volatile bit PUA4              @ ((unsigned)&PUACON*8)+4;
volatile bit PUA5              @ ((unsigned)&PUACON*8)+5;

// Register: PDBCON
volatile unsigned char           PDBCON                @ 0x09C;
// bit and bitfield definitions
volatile bit PDB0             @ ((unsigned)&PDBCON*8)+0;
volatile bit PDB1             @ ((unsigned)&PDBCON*8)+1;
volatile bit PDB2             @ ((unsigned)&PDBCON*8)+2;
volatile bit PDB3             @ ((unsigned)&PDBCON*8)+3;
volatile bit PDB4             @ ((unsigned)&PDBCON*8)+4;
volatile bit PDB5             @ ((unsigned)&PDBCON*8)+5;
volatile bit PDB6             @ ((unsigned)&PDBCON*8)+6;
volatile bit PDB7             @ ((unsigned)&PDBCON*8)+7;
// Register: ODBCON
volatile unsigned char           ODBCON  @ 0x09D;
// bit and bitfield definitions
volatile bit ODB0             @ ((unsigned)&ODBCON*8)+0;
volatile bit ODB1             @ ((unsigned)&ODBCON*8)+1;
volatile bit ODB2             @ ((unsigned)&ODBCON*8)+2;
volatile bit ODB3             @ ((unsigned)&ODBCON*8)+3;
volatile bit ODB4             @ ((unsigned)&ODBCON*8)+4;
volatile bit ODB5             @ ((unsigned)&ODBCON*8)+5;
volatile bit ODB6             @ ((unsigned)&ODBCON*8)+6;
volatile bit ODB7             @ ((unsigned)&ODBCON*8)+7;
// Register: PUBCON
volatile unsigned char           PUBCON     @ 0x09E;
// bit and bitfield definitions.
volatile bit PUB0             @ ((unsigned)&PUBCON*8)+0;
volatile bit PUB1             @ ((unsigned)&PUBCON*8)+1;
volatile bit PUB2             @ ((unsigned)&PUBCON*8)+2;
volatile bit PUB3             @ ((unsigned)&PUBCON*8)+3;
volatile bit PUB4             @ ((unsigned)&PUBCON*8)+4;
volatile bit PUB5             @ ((unsigned)&PUBCON*8)+5;
volatile bit PUB6             @ ((unsigned)&PUBCON*8)+6;
volatile bit PUB7             @ ((unsigned)&PUBCON*8)+7;
// Register: SMCR
volatile unsigned char           SMCR                @ 0x09F;

volatile bit SE              @ ((unsigned)&SMCR*8)+0;
volatile bit SM0             @ ((unsigned)&SMCR*8)+1;
volatile bit SM1             @ ((unsigned)&SMCR*8)+2;
volatile bit SM2             @ ((unsigned)&SMCR*8)+3;


#endif
